- I will confess to skimming by the end. But I don’t think they explained how they solved the cache issue except to say they rewrote the software in Rust, which is pretty vague.
Was all the code they rewrote originally in Lua? So was it just a matter of moving from a dynamic language with pointer-heavy data structures to a static language with value types and more control over memory layout? Or was there something else going on?
- It seems like the unspoken takeaway is just how shockingly performant LuaJIT is, even relative to Rust.
- Is the Linux scheduler aware of shared CPU cache hierarchies? Is there any way we could make the scheduler do better cache utilization rather than pinning processes to cores or offloading these decisions to vendor specific code?
- This post sponsored by AMD®.
- Epyc’s naming is beautiful and consistent
by attentive
1 subcomments
- That was annoying to read because there is no easy to see impact of each change.
It's FL2 + Gen 13 combined.
I.e. what's the FL2 benchmark on Gen 12 compared to FL1?
- > trading cache for cores
Viva el Celeron
> for 2x performance
You wish.
Are people at Coudfare so young that they didn't heard about Celeron and Duron ?
by howdyhowdy
0 subcomment
- Someday someone will deploy CXL
- Reminds that time when cheap Celeron with small cache was beating expensive Pentium with large cache (if i remember correctly that Celeron's cache was running at the core frequency while Pentium's was a separate die on half-frequency, and Celeron was very overclockable)
by danpalmer
2 subcomments
- The tradeoff: The opportunity: Proving it out:
Nah I'm good thanks. Slop takes more effort to read and just raises questions of accuracy. It's just disrespectful to your reader to put that work on them. And in a marketing blog post it's just a bad idea.
- [flagged]
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